Glossary

Table of Contents

A-G

APSOC
All Programmable System on Chip
BSP
A board support package (BSP) is a collection of low-level libraries and drivers. The Xilinx® software development Kit (SDK) uses a BSP to form the lowest layer of your application software stack. Software applications must link against or run on top of a given software platform using the APIs that it provides. Therefore, before you can create and use software applications in SDK, you must create a board support package
FPGA
Field Programmable Gate Arrays (FPGAs) are semiconductor devices that are based around a matrix of configurable logic blocks (CLBs) connected via programmable interconnects. FPGAs can be reprogrammed to desired application or functionality requirements after manufacturing. This feature distinguishes FPGAs from Application Specific Integrated Circuits (ASICs), which are custom manufactured for specific design tasks.

H-R

Hardware Platform
An SDK project
HDF
Hardware Definition File (.hdf). This file is created by Vivado and contains information about a processor system in an FPGA overlay. The HDF specifies the peripherals that exist in the system, and the memory map. This is used by the BSP to build software libraries to support the available peripherals.
I2C
See IIC
IIC
Inter-Integrated Circuit; multi-master, multi-slave, single-ended, serial computer bus protocol
IOPs
Input/Output Processors
Jupyter (Notebooks)
Jupyter is an open source project consisting of an interactive, web application that allows users to create and share notebook documents that contain live code and the full range of rich media supported by modern browsers. These include text, images, videos, LaTeX-styled equations, and interactive widgets. The Jupyter framework is used as a front-end to over 40 different programming languages. It originated from the interactive data science and scientific computing communities. Its uses include: data cleaning and transformation, numerical simulation, statistical modelling, machine learning and much more.
MicroBlaze
MicroBlaze is a soft microprocessor core designed for Xilinx FPGAs. As a soft-core processor, MicroBlaze is implemented entirely in the general-purpose memory and logic fabric of an FPGA.
Pmod Interface
The Pmod or Peripheral Module interface is used to connect low frequency, low I/O pin count peripheral modules to host controller boards.accessory boards to add functionality to the platform. e.g. ADC, DAC, I/O interfaces, sensors etc.
(Micro) SD
Secure Digital (Memory Card standard)
readthedocs.org
readthedocs.org is a popular website that hosts the documentation for open source projects at no cost. readthedocs.org uses Sphinx document generation tools to automatically generate both the website and PDF versions of project documentation from a GitHub repository when new updates are pushed to that site.
REPL
A read–eval–print loop (REPL), also known as an interactive toplevel or language shell, is a simple, interactive computer programming environment that takes single user inputs (i.e. single expressions), evaluates them, and returns the result to the user; a program written in a REPL environment is executed piecewise. The term is most usually used to refer to programming interfaces similar to the classic Lisp machine interactive environment. Common examples include command line shells and similar environments for programming languages, and is particularly characteristic of scripting languages wikipedia
reST
Restructured text is a markup language used extensively with the Sphinx document generator

S-Z

SDK
Xilinx SDK - Software Development Kit. Software development environment including cross-compiles for ARM®, and MicroBlaze processors. Also includes debug, and profiling tools. Required to build software for a MicroBlaze processor inside an IOP.
SOC
System On Chip
Sphinx
A document generator written in Python and used extensively to document Python and other coding projects
SPI
Serial Peripheral Interface; synchronous serial communication interface specification
UART
Universal asynchronous receiver/transmitter; Serial communication protocol
Vivado
Vivado Design Suite is a suite of computer-aided design tools provided by Xilinx for creating FPGA designs. It is used to design and implement the overlays used in Pynq.
XADC
An XADC is a hard IP block that consists of dual 12-bit, 1 Mega sample per second (MSPS), analog-to-digital converters and on-chip sensors which are integrated into Xilinx 7 series FPGA devices
Zynq®
Zynq-7000 All Programmable SoC (APSoC) devices integrate the software programmability of an ARM®-based processor with the hardware programmability of an FPGA, enabling key analytics and hardware acceleration while integrating CPU, DSP, ASSP, and mixed signal functionality on a single device. Zynq-7000 AP SoCs infuse customizable intelligence into today’s embedded systems to suit your unique application requirements
Zynq PL
Programmable Logic - FPGA fabric
Zynq PS
Processing System - SOC processing subsystem built around dual-core, ARM Cortex-A9 processor