# PYNQ SD Card¶

The PYNQ image for the PYNQ-Z1 is provided precompiled as a downloadable SD card image, so you do not need to rerun this flow for the PYNQ-Z1 unless you want to make changes to the image flow.

This flow can also be used as a starting point to build a PYNQ image for another Zynq board.

The image flow will create the Zynq BOOT.bin, the u-boot bootloaded, the Linux Device tree blob, and the Linux kernel.

The source files for the PYNQ image flow build can be found here:

<PYNQ repository>/sdbuild


More details on configuring the root filesystem can be found in the README file in the folder above.

## Building the Image¶

It is recommended to use a Virtual machine to run the image build flow. A clean and recent VM image is recommended. The flow provided has been tested on Ubuntu 16.04.

To build the image follow the steps below:

1. Install Vivado 2016.1 and Xilinx SDK 2016.1
2. Install dependencies using the following script
<PYNQ repository>/sdbuild/scripts/setup_host.sh

1. Source the appropriate settings files from Vivado and Xilinx SDK
2. Navigate to the following directory and run make
cd <PYNQ repository>/sdbuild/
make


The build flow can take several hours.

## Retargeting to a Different Board¶

While the root filesystem is portable between different Zynq boards the boot files will have to be customised for each board. The boot files can be found in

<PYNQ repository>/sdbuild/boot_configs


There is a standardised flow for Zynq-7000 boards defined in

<PYNQ repository>/sdbuild/Zynq7000.makefile


This file is customised by setting a number of variables and providing paths to some setup scripts. The Board-specific config file is by convention placed in:

<PYNQ repository>/sdbuild/boot_configs/<Board Name>-defconfig


### Variables in config¶

The config file must define several variables:

• BOARD: e.g. PYNQ-Z1. This is used to customize some parts of the flow, and will utimately be used by Python
• BOARD_PART: e.g. xc7z020clg400-1. This is used to create a Vivado project and generate a Hardware Description File (.hdf) for use in Xilinx SDK.
• BOARD_CONSTRAINTS: Path to the constraints file (.xdc) containing the top level constraints file for the board.
• PS_CONFIG_TCL: The path to a tcl file that configures the instantiated Processing System IP.
• LINUX_REPO: The GitHub path to the Linux repository to clone from
• LINUX_COMMIT: The GitHub hash from which to clone the linux repository
• LINUX_CONFIG: The path to the Linux configuration file (.config)
• UBOOT_REPO: The GitHub path to the UBoot repository to clone from
• UBOOT_COMMIT: The GitHub hash from which to clone the UBoot repository
• UBOOT_CONFIG: The path to the UBoot configuration file (.config)
• BOARD_DTSI: The path to the devicetree fragment applied to the device tree generated by Xilinx SDK.

The config file can define several optional variables

• BOOT_BITSTREAM: The bitstream file (.bit) to be downloaded onto the PL at boot

### Build Flow Description¶

The SD Card build flow starts by creating a simple Vivado Project using the BOARD, BOARD_PART, BOARD_CONSTRAINTS, and PS_CONFIG variables. This vivado project is used to generate a Hardware Description File (.hdf) for Xilinx SDK.

Following the cration of the Hardware Description File, the First State Bootloader (FSBL) and Device Tree file are created. While the FSBL is not customisable, the device tree can be modified by addding or reconfiguring entries or by BOARD_DTSI.

Next, the LINUX_REPO and UBOOT_REPO repositories are cloned, checked out and configured.

Finally, the BOOT_BITSTREAM is packaged.

Once a boot configuration is defined for a board it needs to be incorporated into a release which live in the following folder:

<PYNQ repository>/sdbuild/releases


A release is a single (.config) file defining the variables:

• BOOT_CONFIG: Path to the name of the project folder in boot_configs
• ROOTFS_CONFIG: Should be Pynq-Z1-Wily

While the root filesystem is designed around the Pynq-Z1 board it should work on any board with similar connectivity, i.e. PS attached Ethernet and USB host ports.