pynq.lib.axigpio Module

The pynq.lib.axigpio module is a driver for interacting with the Xilinx AXIGPIO IP Block. Each AXI GPIO IP instantiated in the fabric has at least one, and at most two channels.

class pynq.lib.axigpio.AxiGPIO(description)[source]

Bases: pynq.overlay.DefaultIP

Class for interacting with the AXI GPIO IP block.

This class exposes the two banks of GPIO as the channel1 and channel2 attributes. Each channel can have the direction and the number of wires specified.

The wires in the channel can be accessed from the channel using slice notation - all slices must have a stride of 1. Input wires can be read and output wires can be written to, toggled, or turned off or on. InOut channels combine the functionality of input and output channels. The tristate of the pin is determined by whether the pin was last read or written.

class Channel(parent, channel)[source]

Bases: object

Class representing a single channel of the GPIO controller.

Wires are and bundles of wires can be accessed using array notation with the methods on the wires determined by the type of the channel:

input_channel[0].read()
output_channel[1:3].on()

This class instantiated not used directly, instead accessed through the AxiGPIO classes attributes. This class exposes the wires connected to the channel as an array or elements. Slices of the array can be assigned simultaneously.

read()[source]

Read the state of the input pins

setdirection(direction)[source]

Set the direction of the channel

Must be one of AxiGPIO.{Input, Output, InOut} or the string ‘in’, ‘out’, or ‘inout’

setlength(length)[source]

Set the number of wires connected to the channel

trimask

Gets or sets the tristate mask for an inout channel

wait_for_interrupt_async()[source]

Wait for the interrupt on the channel to be signalled

This is intended to be used by slices waiting for a particular value but can be used in any situation to wait for a per-channel interrupt.

write(val, mask)[source]

Set the state of the output pins

class InOut(parent, start, stop)[source]

Bases: pynq.lib.axigpio.Input, pynq.lib.axigpio.Output

Class representing wires in an inout channel.

This class should be passed to setdirection to indicate the channel should be used for both input and output. It should not be used directly.

read()[source]

Reads the value of all the wires in the slice

Changes the tristate of the slice to input. If there is more than one wire in the slice then the least significant bit of the return value corresponds to the wire with the lowest index.

write(val)[source]

Set the value of the slice

Changes the tristate of the slice to output. If the slice consists of more than one wire then the least significant bit of val corresponds to the lowest index wire.

class Input(parent, start, stop)[source]

Bases: object

Class representing wires in an input channel.

This class should be passed to setdirection to indicate the channel should be used for input only. It should not be used directly.

read()[source]

Reads the value of all the wires in the slice

If there is more than one wire in the slice then the least significant bit of the return value corresponds to the wire with the lowest index.

wait_for_value(value)[source]

Wait until the specified value is read

This function is dependent on interrupts being enabled and will throw a RuntimeError otherwise. Internally it uses asyncio so should not be used inside an asyncio task. Use wait_for_value_async if using asyncio.

wait_for_value_async(value)[source]

Coroutine that waits until the specified value is read

This function relies on interrupts being available for the IP block and will throw a RuntimeError otherwise.

class Output(parent, start, stop)[source]

Bases: object

Class representing wires in an output channel.

This class should be passed to setdirection to indicate the channel should be used for output only. It should not be used directly.

off()[source]

Turns off all of the wires in the slice

on()[source]

Turns on all of the wires in the slice

read()[source]

Reads the value of all the wires in the slice

If there is more than one wire in the slice then the least significant bit of the return value corresponds to the wire with the lowest index.

toggle()[source]

Toggles all of the wires in the slice

write(val)[source]

Set the value of the slice

If the slice consists of more than one wire then the least significant bit of val corresponds to the lowest index wire.

bindto = ['xilinx.com:ip:axi_gpio:2.0']
setdirection(direction, channel=1)[source]

Sets the direction of a channel in the controller

Must be one of AxiGPIO.{Input, Output, InOut} or the string ‘in’, ‘out’ or ‘inout’

setlength(length, channel=1)[source]

Sets the length of a channel in the controller