pynq.lib.dma Module

class pynq.lib.dma.DMA(description, *args, **kwargs)[source]

Bases: pynq.overlay.DefaultIP

Class for Interacting with the AXI Simple DMA Engine

This class provides two attributes for the read and write channels. The read channel copies data from the stream into memory and the write channel copies data from memory to the output stream. Both channels have an identical API consisting of transfer and wait functions. If interrupts have been enabled and connected for the DMA engine then wait_async is also present.

Buffers to be transferred must be allocated through the Xlnk driver using the cma_array function either directly or indirectly. This means that Frames from the video subsystem can be transferred using this class.

recvchannel

The stream to memory channel

Type:_DMAChannel
sendchannel

The memory to stream channel

Type:_DMAChannel
bindto = ['xilinx.com:ip:axi_dma:7.1']